半导体与先进封装 · 全部实体（第 83 / 100 页）

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• The ferroelectric field-effect transistor with negative capacitance
  Integrating ferroelectric negative capacitance (NC) into the field-effect transistor (FET) promises to break fundamental limits of power dissipation known as Boltzmann tyranny. However, realizing the stable static negative capacitance in the non-transient non-…
  arxiv I. Luk'yanchuk, A. Razumnaya, A. Sené, Y. Tikhonov 等 2021-08-06T07:02:28Z 置信度 0.78 cond-mat.mes-hallcond-mat.mtrl-sci
• A Single-Crystalline, Epitaxial SrTiO3 Thin-Film Transistor
  We report herein fabrication and characterization of a thin-film transistor (TFT) using single-crystalline, epitaxial SrTiO3 film, which was grown by a pulsed laser deposition technique followed by the thermal annealing treatment in an oxygen atmosphere. Altho…
  arxiv Kosuke Uchida, Akira Yoshikawa, Kunihito Koumoto, Takeharu Kato 等 2009-12-22T08:48:44Z 置信度 0.78 cond-mat.mtrl-scicond-mat.str-el
• New Silicon Carbide (SiC) Hetero-Junction Darlington Transistor
  Basic SiC bipolar transistors have been studied in the past for their applications where high power or high temperature operation is required. However since the current gain in SiC bipolar transistors is very low and therefore, a large base drive is required i…
  arxiv M. Jagadesh Kumar, Amit Sharma 2010-08-18T06:01:03Z 置信度 0.78 cond-mat.mtrl-sci
• Noise properties of the SET transistor in the co-tunneling regime
  Zero-frequency spectral densities of current noise, charge noise, and their cross-correlation are calculated for the SET transistor in the co-tunneling regime. The current noise has a form expected for the uncorrelated co-tunneling events. Charge noise is crea…
  arxiv D. V. Averin 2000-10-03T23:18:21Z 置信度 0.78 cond-mat.mes-hall
• Kolmogorov-Arnold Network for Transistor Compact Modeling
  Neural network (NN)-based transistor compact modeling has recently emerged as a transformative solution for accelerating device modeling and SPICE circuit simulations. However, conventional NN architectures, despite their widespread adoption in state-of-the-ar…
  arxiv Rodion Novkin, Hussam Amrouch 2025-03-19T13:49:50Z 置信度 0.78 cs.LG
• Quantum scaling in nano-transistors
  In our previous papers on ballistic quantum transport in nano-transistors [J. Appl. Phys. 98, 84308 (2005)] it was demonstrated that under certain conditions it is possible to reduce the three-dimensional transport problem to an effectively one-dimensional one…
  arxiv U. Wulf 2008-08-19T11:41:06Z 置信度 0.78 cond-mat.mes-hall
• InP Crystal Phase Heterojunction Transistor with a Vertical Gate-All-Around Structure
  crossref 2024-05-31T09:01:07Z 置信度 0.70
• Quantum simulation study of gate-all-around (GAA) silicon nanowire transistor and double gate metal oxide semiconductor field effect transistor (DG MOSFET)
  crossref Reza Hosseini 2012-08-15T11:43:47Z 置信度 0.70
• High Performance Vertical Resonant Photo-Effect-Transistor with an All-Around OLED-Gate for Ultra-Electromagnetic Stability
  crossref 2020-04-08T17:25:47Z 置信度 0.70
• Modeling the single-gate, double-gate, and gate-all-around tunnel field-effect transistor
  Tunnel field-effect transistors (TFETs) are potential successors of metal-oxide-semiconductor FETs because scaling the supply voltage below 1 V is possible due to the absence of a subthreshold-swing limit of 60 mV/decade. The modeling of the TFET performance, …
  crossref Anne S. Verhulst, Bart Sorée, Daniele Leonelli, William G. Vandenberghe 等 2010-01-28T23:09:33Z 置信度 0.70
• Gate-All-Around Silicon Nanowire Field Effect Transistor Behavior at High Gate Voltages
  crossref Reza Nekovei, Daryoush Shiri, Amit Verma 2024-11-07T19:47:39Z 置信度 0.70
• Quantum Modelling of Nanoscale Silicon Gate-All-Around Field Effect Transistor
  The paper introduces an analytical model for gate all around (GAA) or Surrounding Gate Metal Oxide Semiconductor Field Effect Transistor (SG-MOSFET) inclusive of quantum mechanical effects. The classical oxide capacitance is replaced by the capacitance incorpo…
  crossref P. Vimala, N.R. Nithin Kumar 2020-11-30T08:42:04Z 置信度 0.70
• Gate all around carbon nanotube field effect transistor espoused discrepancy cascode pass transistor adiabatic logic for ultra-low power application
  crossref B. Jyothi, B.V. Ramana Reddy, Mansi Jhamb 2024-08-14T17:17:02Z 置信度 0.70
• Effect of gate bias on channel in depletion-all-around operation of the SOI four-gate transistor
  crossref Shafat Jahangir, Quazi Deen Mohd Khosru, Anisul Haque 2009-01-29T16:44:06Z 置信度 0.70
• Electrostatic Characteristics of High-k Stacked Gate-All-Around Heterojunction Tunnel Field Effect Transistor using Superposition Principle
  Abstract We use superposition method to model the electrostatic characteristics of high-k stacked Gate-All-Around Hetero Junction TFETs (GAA-HJTFETs). The hetero junction is set up by using Ge/Si material in the source/channel respectively. The modeling is acc…
  preprints usha C, P Vimala, K Ramkumar, V.N. Ramakrishnan 2021 置信度 0.74
• Design and performance analysis of heterojunction dual wire gate all around nanosheet field effect transistor
  crossref 2025-04-29T15:31:59Z 置信度 0.70
• Erratum: “Gate electrostatic controllability enhancement in nanotube gate all around field effect transistor” [AIP Adv. 13, 065006 (2023)]
  crossref Laixiang Qin, Chunlai Li, Yiqun Wei, Ziang Xie 等 2023-07-14T11:53:05Z 置信度 0.70
• Fabrication of raised S/D gate-all-around transistor and gate misalignment analysis
  crossref Chunshan Yin, P.C.H. Chan, V.W.C. Chan 2003-09-30T14:33:34Z 置信度 0.70
• Analytical drain current formulation for gate dielectric engineered dual material gate-gate all around-tunneling field effect transistor
  crossref Jaya Madan, R. S. Gupta, Rishu Chaujar 2015-08-10T09:13:22Z 置信度 0.70
• Optimization of 3D Stacked Nanosheets in 5nm Gate-all-around Transistor Technology
  crossref Anil Kumar Gundu, Volkan Kursun 2022-03-24T21:59:13Z 置信度 0.70
• A Novel Germanium-Around-Source Gate-All-Around Tunnelling Field-Effect Transistor for Low-Power Applications
  This paper presents a germanium-around-source gate-all-around tunnelling field-effect transistor (GAS GAA TFET). The electrical characteristics of the device were studied and compared with those of silicon gate-all-around and germanium-based-source gate-all-ar…
  crossref Ke Han, Shanglin Long, Zhongliang Deng, Yannan Zhang 等 2020-02-03T11:28:31Z 置信度 0.70
• Investigation of Gate all around Dual Metal gate Silicon Carbide Nanowire Field Effect Transistor for harsh Chemical environment applications
  crossref Anshul Saxena, Deboraj Muchahary, B Acharya 2025-12-02T18:44:54Z 置信度 0.70
• Evolution of Transistor Architecture: From FinFET to Gate-All-Around Technology
  The evolution from FinFET to Gate-All-Around (GAA) technology marks a pivotal advancement in semiconductor manufacturing, addressing critical challenges in transistor scaling and power efficiency. This transition represents a fundamental shift in device archit…
  crossref Rajesh Arsid 2025-04-02T16:06:41Z 置信度 0.70
• Optimization of Novel L-shaped Gate All Around Junctionless Field Effect Transistor
  crossref Mohammad Tabarsi Sochelmaei, Arash Yazdanpanah Goharrizi 2022-07-20T19:37:22Z 置信度 0.70
• Gate All Around Tunnel Field Effect Transistor for Future VLSI Applications
  crossref Sanjeet Kumar Sinha, Sweta Chander 2025-11-17T18:38:59Z 置信度 0.70
• An Analytical Modeling of Conical Gate-All-Around Tunnel Field Effect Transistor
  crossref Usha C, Vimala P 2020-07-27T20:02:36Z 置信度 0.70
• Comparative Analysis of 12-nm Gate-all-Around Vertically Stacked Nanosheet Field Effect Transistor for High-k Gate-oxide Dielectrics
  crossref Kanchan Saini, Vinod Kumar 2024-10-08T17:33:10Z 置信度 0.70
• Performance Analysis of Gate-All-Around Field Effect Transistor for CMOS Nanoscale Devices
  crossref Awanit Sharma, Shyam Akashe 2013-12-18T08:51:08Z 置信度 0.70
• Analyze the Tunneling Effect on Gate-All-Around Field Effect Transistor
  crossref Awanit Sharma, Shyam Akashe 2014-09-17T05:25:04Z 置信度 0.70
• Analytical modeling of transport phenomena in heterojunction triple metal gate all around tunneling field effect transistor
  An analytical model for the transport phenomena of a heterojunction triple metal gate all around tunneling field effect transistor (HTM GAA TFET) is developed for the first time in this paper. The continuous surface potential profile of the staggered-gap align…
  crossref Marjana Mahdia, Quazi Deen Mohd Khosru 2020-09-21T10:05:38Z 置信度 0.70
• Analysis of structural variation and threshold voltage modulation in 10-nm double gate-all-around (DGAA) transistor
  crossref Myunghwan Ryu, Youngmin Kim 2017-03-07T22:06:47Z 置信度 0.70
• Electronic transport mechanisms in scaled gate-all-around silicon nanowire transistor arrays
  Low-frequency noise is used to study the electronic transport in arrays of 14 nm gate length vertical silicon nanowire devices. We demonstrate that, even at such scaling, the electrostatic control of the gate-all-around is sufficient in the sub-threshold volta…
  crossref N. Clément, X. L. Han, G. Larrieu 2013-12-27T23:54:44Z 置信度 0.70
• Design analysis of Gate-All-Around nanowire tunnel field effect transistor
  crossref Nitika Sharma, Nidhi Garg, Gurpreet Kaur 2021-03-07T18:07:13Z 置信度 0.70
• Performance analysis of junctionless gate all around tunnel field effect transistor
  crossref D. Jackuline Moni, T. Jaspar Vinitha Sundari 2016-09-19T16:52:22Z 置信度 0.70
• Tunneling Leakage Current of Gate-All-Around Nanowire Junctionless Transistor with an Auxiliary Gate
  crossref Linyuan Zhao, Wenjie Chen, Renrong Liang, Yu Liu 等 2019-07-04T22:13:57Z 置信度 0.70
• Low-Temperature (Cryogenic) Transport in Gate-All-Around (GAA) Silicon Nanowire Field-Effect Transistor
  crossref Amit Verma, Reza Nekovei, Daryoush Shiri 2024-08-22T17:38:42Z 置信度 0.70
• Gate-All-Around Silicon Nanowire Transistor Technology
  crossref Ru Huang, Runsheng Wang, Ming Li 2020-07-16T13:03:43Z 置信度 0.70
• Design and Investigation of Silicon Gate-All-Around Junctionless Field-Effect Transistor Using a Step Thickness Gate Oxide
  crossref Wenlun ZHANG, Baokang WANG 2021-01-14T22:09:33Z 置信度 0.70
• Analytical model to study the impact of ferroelectric materials SBT/PZT on elliptical gate all around junctionless transistor
  crossref Hema Mehta, Harsupreet Kaur 2017-10-25T15:26:23Z 置信度 0.70
• Highly gate-tuneable Rashba spin-orbit interaction in a gate-all-around InAs nanowire metal-oxide-semiconductor field-effect transistor
  Abstract III-V semiconductors have been intensively studied with the goal of realizing metal-oxide-semiconductor field-effect transistors (MOSFETs) with high mobility, a high on-off ratio, and low power consumption as next-generation transistors designed to re…
  crossref K. Takase, Y. Ashikawa, G. Zhang, K. Tateno 等 2017-04-11T10:44:46Z 置信度 0.70
• Investigation of a Gate Stack Gate-All-Around Junctionless Nanowire Field-Effect Transistor for Oxygen Gas Sensing
  crossref Rishu Chaujar, Mekonnen Getnet Yirak 2024-02-17T23:04:13Z 置信度 0.70
• Performance Analysis of Gate-All-Around Transistor at Various Technology Nodes
  crossref Vanita Mehta, Sandeep Kumar Arya, Rajiv Sharma 2024-07-29T18:59:35Z 置信度 0.70
• NEGF simulations of a junctionless Si gate-all-around nanowire transistor with discrete dopants
  crossref A. Martinez, A. R. Brown, S. Roy, A. Asenov 2011-05-03T15:39:52Z 置信度 0.70
• Demonstration of dual switching operation of vertical gate-all-around transistor using InGaAs/GaSb core-shell nanowires on Si
  crossref Hironori Gamo, Junichi Motohisa, Katsuhiro Tomioka 2022-11-04T01:40:39Z 置信度 0.70
• Analysis of Low Frequency Drain Current Model for Silicon Nanowire Gate-All-Around Field Effect Transistor
  crossref Awanit Sharma 2015-11-10T09:45:02Z 置信度 0.70
• Vertical gate-all-around nanowire transistor: Analysis of non-ideal device features for variability reduction
  crossref Yiqi Sun, Xintong Zhang 2026-06-21T14:42:07Z 置信度 0.70
• Quantum Transport through a Constriction in Nanosheet Gate-all-around Transistor
  Abstract In nanoscale transistors, quantum mechanical effects such as tunneling and quantization significantly influence device characteristics. However, large-scale quantum transport simulation still remains a challenging field, making it difficult to account…
  europepmc Kyoung Yeon Kim, Hong-Hyun Park, Seonghoon Jin, Soo-Young Park 等 2024 置信度 0.80
• Scale length determination of Gate all around (Octagonal cross section) Junctionless Transistor
  crossref Kaushik Chandra Deva Sarma, Santanu Sharma 2015-03-17T23:17:44Z 置信度 0.70
• Vacuum gate dielectric gate-all-around nanowire for hot carrier injection and bias temperature instability free transistor
  A gate-all-around (GAA) field effect transistor with vacuum gate dielectric is presented as a structure free from hot-carrier injection and bias temperature instability. A conventional GAA fabrication process is used along with selective removal of the sacrifi…
  crossref Jin-Woo Han, Dong-Il Moon, Jae Sub Oh, Yang-Kyu Choi 等 2014-06-26T14:36:47Z 置信度 0.70
• A 30 nm gate-all-around poly-Si nano wire thin-film transistor
  crossref Chen-Ming Lee, Bing-Yue Tsui 2010-06-24T14:40:18Z 置信度 0.70
• Gate-All-Around Vertical Channel Transistor Based on Self-Aligned in 2 Pitch Process for Future DRAM
  crossref Seunguk Han 2024-10-16T00:21:36Z 置信度 0.70
• Hetro-Dielectric (HD) Oxide-Engineered Junctionless Double Gate all around (DGAA) Nanotube Field Effect Transistor (FET)
  crossref Raj Kumar, Arvind Kumar 2020-09-15T05:03:03Z 置信度 0.70
• Hetero-dielectric macaroni channel cylindrical gate all around field effect transistor (HD-MC CGAA FET) for reduced gate leakage analog applications
  crossref Aapurva Kaul, Sonam Rewari, Deva Nand 2023-12-23T19:02:17Z 置信度 0.70
• Characterization of Four-Level Random Telegraph Noise in a Gate-All-Around Poly-Si Nanowire Transistor
  crossref You-Tai Chang, Pei-Wen Li, Horng-Chih Lin 2019-08-01T19:58:42Z 置信度 0.70
• Modeling and Analysis of Body Potential of Cylindrical Gate-All-Around Nanowire Transistor
  crossref B. Ray, S. Mahapatra 2008-08-20T11:06:00Z 置信度 0.70
• Double-gate-all-around tunnel field-effect transistor
  crossref Wen-Hao Zhang, Zun-Chao Li, Yun-He Guan, Ye-Fei Zhang 2017-07-05T10:39:48Z 置信度 0.70
• Design and improved performance of gate stacked dual material gate all around nanowire field effect transistor with spacer based underlap extension
  Abstract This work presents the design and optimization of a gate-stacked underlap-engineered silicon nanowire MOSFET (GSUESNW-MOSFET) with an HfO 2 spacer for the 10-nm technology node. The electric field generated by the device work function difference at th…
  crossref Hina Ismat, Singam Aruna, Srinivasa Naik K, B Balaji 2026-03-17T23:00:27Z 置信度 0.70
• Finite element analysis of silicon gate all around Nanowire Transistor with different high-k dielectrics
  crossref Neel Chatterjee, Kshitij Chopra, Kshitij Bhatia, Sujata Pandey 2016-01-07T22:18:48Z 置信度 0.70
• Novel Stacked Gate All-Around Nanosheet Transistor-Based DRAM
  crossref Imtiyaz Ahmad khan, Sanjeev Kumar Manhas, Arvind Kumar, Mahendra Pakala 2024-01-11T20:18:45Z 置信度 0.70
• Vertical field effect transistor with sub-15nm gate-all-around on Si nanowire array
  crossref G. Larrieu, Y. Guerfi, X.L Han, N. Clement 2015-11-12T18:03:10Z 置信度 0.70
• Degradation mechanisms in gate-all-around silicon Nanowire field effect transistor under electrostatic discharge stress – a modeling approach
  crossref Cher Ming Tan, Xiangchen Chen 2014-04-23T06:07:16Z 置信度 0.70
• Gate-All-Around (GAA) Synaptic Transistor with Linear Weight Adjustability for Neuromorphic Computing Architecture
  crossref Hasan Ansari, Kannan U.M., Seongjae Cho 2023-09-06T04:15:44Z 置信度 0.70
• Impact of Channel Splitting on Gate All Around Tunnel Field Effect Transistor (GAATFET)
  crossref Mayuresh Joshi, Arya Dutt, Sanjana Tiwari, Prakhar Nigam 等 2021-06-21T21:42:07Z 置信度 0.70
• Investigation of Gate All Around Junctionless Nanowire Transistor with Arbitrary Polygonal Cross Section
  crossref Monika Sharma, Mridula Gupta, Rakhi Narang, Manoj Saxena 2019-01-24T03:18:03Z 置信度 0.70
• Device Simulation on Gate-All-Around Cylindrical Transistor
  crossref Deyuan Xiao, Xi Wang, Jing Chen, Xiaolu Huang 等 2010-11-30T21:09:55Z 置信度 0.70
• Transport and performance of a gate all around InAs nanowire transistor
  crossref Khairul Alam 2009-07-01T03:14:16Z 置信度 0.70
• Sensitivity Investigation of Junctionless Gate-all-around Silicon Nanowire Field-Effect Transistor-Based Hydrogen Gas Sensor
  crossref Rishu Chaujar, Mekonnen Getnet Yirak 2022-12-21T03:03:20Z 置信度 0.70
• One-Transistor Dynamic Random-Access Memory Based on Gate-All-Around Junction-Less Field-Effect Transistor with a Si/SiGe Heterostructure
  This paper presents a one-transistor dynamic random-access memory (1T-DRAM) cell based on a gate-all-around junction-less field-effect transistor (GAA-JLFET) with a Si/SiGe heterostructure for high-density memory applications. The proposed 1T-DRAM achieves the…
  crossref Young Jun Yoon, Jae Sang Lee, Dong-Seok Kim, Sang Ho Lee 等 2020-12-13T20:56:57Z 置信度 0.70
• A novel hybrid gate-all-around high voltage thin film transistor with T-shaped metal field plate
  crossref Jhen-Yu Tsai, Hsin-Hui Hu, Yung-Chun Wu 2015-12-08T17:19:12Z 置信度 0.70
• Germanium v/s silicon Gate-all-around junctionless nanowire transistor
  crossref Pankaj Kumar, Sangeeta Singh, Neelesh Pratap Singh, Bharti Modi 等 2014-10-22T16:11:39Z 置信度 0.70
• Fabrication and Transport Properties of Gate-All-Around Silicon Quantum Wire Transistor
  crossref K. Morimoto, Y. Hirai, K. Yuki, K. Morita 2015-11-06T07:35:44Z 置信度 0.70
• TCAD performance analysis of high-K dielectrics for gate all around InAs nanowire transistor considering scaling of gate dielectric thickness
  crossref Richa Gupta, Rakesh Vaid 2016-03-02T06:19:08Z 置信度 0.70
• Analysis of Dielectric Modulated Gate-All-Around (GAA) Junctionless Transistor-Based Biosensor
  crossref Achinta Baidya, Vishal Kumar Pandey, Aditya Abhiraj, Kartik Swamy 等 2026-02-18T21:13:38Z 置信度 0.70
• Ballistic current-voltage model in depletion all around operation of the SOI four-gate transistor
  crossref S Jahangir, I Jahangir, Q D M Khosru, S Hossain 2011-01-13T16:35:39Z 置信度 0.70
• Gate-all-around silicon nanowire FET modeling
  crossref Xiangchen Chen 2019-10-02T12:38:40Z 置信度 0.70
• Diameter Scaling in III-V Gate-All-Around Transistor for Different Cross-Sections
  crossref Priyank Rastogi, Avirup Dasgupta, and Yogesh Singh Chauhan 2018-10-09T15:51:26Z 置信度 0.70
• Sensitivity investigation of gate-all-around junctionless transistor for hydrogen gas detection
  crossref Yogesh Pratap, Manoj Kumar, Mridula Gupta, Subhasis Haldar 等 2016-10-20T20:51:50Z 置信度 0.70
• TCAD Study on Strain Engineering in Vertical Channel Gate-all-around Transistor
  crossref Ran Bi, Baotong Zhang, Jianhuan Wang, Jianjun Zhang 等 2024-01-24T18:33:59Z 置信度 0.70
• Radiation Response of a Gate-All-Around Silicon Nano-Wire Transistor
  crossref Bruce Draper, Murat Okandan, Marty Shaneyfelt 2009-12-11T15:56:57Z 置信度 0.70
• 5-nm Gate-All-Around Transistor Technology With 3-D Stacked Nanosheets
  crossref Anil Kumar Gundu, Volkan Kursun 2022-02-02T21:35:17Z 置信度 0.70
• Electric Field Modulation in Gate-All-Around Nanosheet Transistor
  crossref Arvind Bisht, Yogendra Pratap Pundir, Tushar Goel, Pankaj Kumar Pal 2025-01-10T20:15:55Z 置信度 0.70
• Representation of strained gate-all-around junctionless tunneling nanowire filed effect transistor for analog applications
  crossref Rouzbeh Molaei Imen Abadi, Seyed Ali Sedigh Ziabari 2016-04-30T07:14:21Z 置信度 0.70
• Performance of dual-channel gate-all-around polysilicon nanowire thin-film transistor
  crossref Po-Chun Huang, Tzu-Shiun Sheu, Chen-Chia Chen, Lu-An Chen 等 2010-03-01T13:38:25Z 置信度 0.70
• Radial bulk-mode vibrations in a gate-all-around silicon nanowire transistor
  crossref M. Ziaei-Moayyed, P. Resnick, B. Draper, M. Okandan 2012-03-26T17:46:16Z 置信度 0.70
• Investigation and Optimization of Silicon Nanowire Gate-All-Around Field Effect Transistor Using Multi-Objective Genetic Based Algorithm
  crossref Awanit Sharma, Shyam Akashe 2014-09-18T06:53:38Z 置信度 0.70
• Analysis of DC Self Heating Effect in Stacked Nanosheet Gate-All-Around Transistor
  crossref Min Jae Kang, Ilho Myeong, Myounggon Kang, Hyungcheol Shin 2018-09-07T14:30:38Z 置信度 0.70
• Novel gate-all around triangular channel horizontal nanowire field-effect transistor for low power memories
  crossref Shivani Chopra, Subha Subramaniam, Sangeeta M. Joshi, R. N. Awale 2016-06-23T19:53:53Z 置信度 0.70
• Effects of Dielectric Constant on the Performance of a Gate All Around InAs Nanowire Transistor
  crossref Khairul Alam, Md. Abu Abdullah 2011-06-07T15:37:16Z 置信度 0.70
• A Comprehensive Analytical Study of Subthreshold Swing for Cylindrical Gate-All-Around Junctionless Field Effect Transistor
  An analytical subthreshold swing (SS) model for Cylindrical Gate-All-Around Junctionless Field Effect Transistor (CGAA JLFET) has been proposed in this work. Basically, 2D Poisson equation has been solved along the channel while assuming a parabolic potential …
  crossref Imtiaz Ahmed, Quazi D. M. Khosru 2016-05-20T09:56:42Z 置信度 0.70
• Fast and efficient light intensity modulation in SOI with gate-all-around transistor phase modulator
  crossref P. Dainesi, K.E. Moselund, L. Thevenaz, A.M. Ionescu 2008-02-06T17:33:00Z 置信度 0.70
• A New Vertical Structure Gate-All-Around Nano Air Channel Transistor
  crossref Haiquan Zhao, JianPeng Zhao, Ruihan Huang, Mo Li 等 2023-06-27T17:26:02Z 置信度 0.70
• On-chip interconnect boosting technique by using of 10-nm double gate-all-around (DGAA) transistor
  crossref Jaemin Lee, Myunghwan Ryu, Youngmin Kim 2015-05-27T18:05:15Z 置信度 0.70
• Impact of high-k gate dielectric with different angles of coverage on the electrical characteristics of gate-all-around field effect transistor: A simulation study
  crossref Mohammad Karbalaei, Daryoosh Dideban, Hadi Heidari 2019-11-22T12:09:43Z 置信度 0.70
• The effects of elliptical gate cross section on carbon nanotube gate-all-around field effect transistor
  crossref Hao Wang, Sheng Chang, Cheng Wang, Yue Hu 等 2013-10-31T00:13:53Z 置信度 0.70
• Scale length determination of Gate all around (regular pentagonal cross section) fully depleted junction less transistor
  crossref Kaushik Chandra Deva Sarma, Santanu Sharma 2015-01-21T14:38:47Z 置信度 0.70
• A Self-Aligned Gate-All-Around MOS Transistor on Single-Grain Silicon
  crossref Shengdong Zhang, Ruqi Han, Hongmei Wang, Mansun Chan 2004-02-26T18:30:08Z 置信度 0.70
• A novel approach of modeling channel potential for Gate All Around nanowire transistor
  crossref M Gaffar, Md M Alam, S A Mamun, M A Zaman 等 2011-01-13T16:35:39Z 置信度 0.70
• On the Vertically Stacked Gate-All-Around Nanosheet and Nanowire Transistor Scaling beyond the 5 nm Technology Node
  This work performs a detailed comparison of the channel width folding effectiveness of the FinFET, vertically stacked nanosheet transistor (VNSFET), and vertically stacked nanowire transistor (VNWFET) under the constraints of the same vertical (fin) height and…
  crossref Hei Wong, Kuniyuki Kakushima 2022-05-20T00:18:11Z 置信度 0.70
• Impact of Sensing Performance on Junction Less Stack Gate All-Around Metal Oxide Semiconductor Field Effect Transistor for Biosensing Application
  crossref Soumya S. Mohanty, Sikha Mishra, Guru Prasad Mishra 2025-05-29T17:06:14Z 置信度 0.70
• Dielectric Modulated Gallium-Arsenide Gate-All-Around Engineered Field Effect Transistor (GaAs-GAAE-FET) Biosensor for Breast Cancer Detection
  crossref Shivani Yadav, Sonam Rewari 2024-04-08T20:33:40Z 置信度 0.70