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• On the minimization of contact resistance in organic thin-film transistors
  Organic semiconductors have been implemented in a variety of electronic devices ranging from organic light-emitting diodes, organic photovoltaic devices, and organic transistors. In all of these devices, the efficient injection and/or extraction of charges acr…
  datacite Borchert, James W. 2020 置信度 0.73 540
• The Physics of Non-equilibrium Reliability Phenomena
  Die kontinuierliche Miniaturisierung von Silizium-basierter Technologie, ermöglicht und getrieben durch das Mooresche Gesetz, ist weiterhin ein wichtiger Bestandteil der International Roadmap for Devices and Systems (IRDS). Die aktuell in modernen Smartphones …
  datacite Jech, Markus 2020 置信度 0.76 BauelementzuverlässigkeitDegradation durch heiße LadungsträgerNichtgleichgewichts SpannungstemperatureinstabilitätDichtefunktionaltheorieMOSFET
• Experimental studies on germanium-tin p-channel tunneling field effect transistors
  Recent years have shown a growing interest in device concepts based on quantum mechanical tunneling. The tunneling field effect transistor (TFET) is a device that competes directly with the metal-oxide-semiconductor field effect transistor (MOSFET) in terms of…
  datacite Rolseth, Erlend Granbo 2017 置信度 0.72 621.3
• Spin-Dependent Transport Signatures Of Bound States: From Finger To Top Gates
  Spin-orbit gap feature in energy dispersion of one-dimensional devices is revealed via strong spin-orbit interaction (SOI) effects under Zeeman field. We describe the utilization of a finger-gate or a top-gate to control the spin-dependent transport characteri…
  datacite Yun-Hsuan Yu, Chi-Shung Tang, Nzar Rauf Abdullah, Gudmundsson, Vidar 2018 置信度 0.73 Spin-orbitZeemantop-gatefinger-gatebound state.
• Spin-Dependent Transport Signatures Of Bound States: From Finger To Top Gates
  Spin-orbit gap feature in energy dispersion of one-dimensional devices is revealed via strong spin-orbit interaction (SOI) effects under Zeeman field. We describe the utilization of a finger-gate or a top-gate to control the spin-dependent transport characteri…
  datacite Yun-Hsuan Yu, Chi-Shung Tang, Nzar Rauf Abdullah, Gudmundsson, Vidar 2018 置信度 0.73 Spin-orbitZeemantop-gatefinger-gatebound state.
• Fabrication And Characterization Of Poly-Si Vertical Nanowire Thin Film Transistor
  In this paper, we present a vertical nanowire thin film transistor with gate-all-around architecture, fabricated using CMOS compatible processes. A novel method of fabricating polysilicon vertical nanowires of diameter as small as 30 nm using wet-etch is prese…
  datacite N. Shen, T. T. Le, H. Y. Yu, Z. X. Chen 等 2011 置信度 0.73 Nanowire (NW)Gate-all-around (GAA)polysilicon (poly-Si)thin-film transistor (TFT).
• Fabrication And Characterization Of Poly-Si Vertical Nanowire Thin Film Transistor
  In this paper, we present a vertical nanowire thin film transistor with gate-all-around architecture, fabricated using CMOS compatible processes. A novel method of fabricating polysilicon vertical nanowires of diameter as small as 30 nm using wet-etch is prese…
  datacite N. Shen, T. T. Le, H. Y. Yu, Z. X. Chen 等 2011 置信度 0.73 Nanowire (NW)Gate-all-around (GAA)polysilicon (poly-Si)thin-film transistor (TFT).
• Vertical Gaa Silicon Nanowire Transistor With Impact Of Temperature On Device Parameters
  In this paper, we present a vertical wire NMOS device fabricated using CMOS compatible processes. The impact of temperature on various device parameters is investigated in view of usual increase in surrounding temperature with device density.
  datacite N. Shen, Z. X. Chen, K.D. Buddharaju, H. M. Chua 等 2010 置信度 0.69 Gate-all-aroundtemperature dependencesilicon nanowire
• Vertical Gaa Silicon Nanowire Transistor With Impact Of Temperature On Device Parameters
  In this paper, we present a vertical wire NMOS device fabricated using CMOS compatible processes. The impact of temperature on various device parameters is investigated in view of usual increase in surrounding temperature with device density.
  datacite N. Shen, Z. X. Chen, K.D. Buddharaju, H. M. Chua 等 2010 置信度 0.69 Gate-all-aroundtemperature dependencesilicon nanowire
• Gate-All-Around Nanosheet Oxide Semiconductor Transistor with Crystalline InGaOx
  crossref Masaharu Kobayashi, Anlan-Chen, Ki-Woong Park, Kota Sakai 等 2026-05-06T19:38:04Z 置信度 0.66
• Gate All around CNTFET based Ternary Content Addressable Memory
  Abstract This paper proposes a design of gate all around CNTFET based ternary content addressable memory (TCAM). TCAM cell is designed and simulated in HSPICE using top gated CNTFET (TG-CNTFET) & gate all around CNTTFET (GAA-CNTFET). Dual chirality techniq…
  crossref Sabzar Shafi Ganie, Amandeep Singh 2022-04-26T18:59:28Z 置信度 0.79 pharmacologyeess.syperovskitephysics.app-phgenetics
• Quantum ballistic transport in ultra-small silicon channel cylindrical gate-all-around junction less nanowire transistor using NEGF formalism
  crossref Md. Mohsinur Rahman Adnan, Md Samzid Bin Hafiz, Nujhat Tasneem, Quazi D.M. Khosru 2017-01-05T17:56:11Z 置信度 0.63
• Analytical modeling of gate-all-around junctionless transistor based biosensors for detection of neutral biomolecule species
  crossref Yogesh Pratap, Manoj Kumar, Sneha Kabra, Subhasis Haldar 等 2017-08-04T10:13:21Z 置信度 0.63
• Physics-based compact model of transient leakage current caused by parasitic bipolar junction transistor in gate-all-around MOSFETs
  crossref Boram Yi, Yeong-Hun Park, Ji-Woon Yang 2019-11-27T19:38:03Z 置信度 0.64
• An analytical modeling approach for a gate all around (GAA) tunnel field effect transistor (TFET)
  crossref Rakhi Narang, Manoj Saxena, R. S. Gupta, Mridula Gupta 2012-11-13T19:56:34Z 置信度 0.63
• Temperature associated reliability issues of heterogeneous gate dielectric-gate all around-tunnel FET
  crossref Java Madan, Rishu Chaujar 2016-10-20T20:51:50Z 置信度 0.63
• Gate-All-Around Nanowire Junctionless Transistor-Based Hydrogen Gas Sensor
  crossref Siddharth Mokkapati, Nivedita Jaiswal, Manish Gupta, Abhinav Kranti 2019-03-05T20:44:44Z 置信度 0.64
• Electrostatic characteristics of a high-k stacked gate-all-around heterojunction tunnel field-effect transistor using the superposition principle
  crossref C. Usha, P. Vimala, K. Ramkumar, V. N. Ramakrishnan 2022-01-03T00:03:15Z 置信度 0.64
• Analytical Current-Voltage Model for Gate-All-Around Transistor with Poly-Crystalline Silicon Channel
  Poly-crystalline silicon channel transistors have been used as a display TFT for a long time and have recently been used in a 3D vertical NAND Flash which is a transistor with 2D plane NAND upright. In addition, multi-gate transistors such as FinFETs and a gat…
  crossref Yoongeun Seon, Jongmin Kim, Soowon Kim, Jongwook Jeon 2019-09-05T03:22:36Z 置信度 0.79 physics.app-phelectrical engineering, electronic engineering, information engineeringcs.itsemiconductorcond-mat.mes-hall
• 3D Design of Gate All‐Around Field Effect Transistor Using Visual TCAD
  crossref B. Srujana, D. Jayanthi, Raji Krishna, D.S. Shylusam 2024-04-27T11:04:40Z 置信度 0.66
• Effective mass approximation versus full atomistic model to calculate the output characteristics of a gate-all-around germanium nanowire field effect transistor (GAA-GeNW-FET)
  crossref Amir Hossein Bayani, Jan Voves, Daryoosh Dideban 2017-12-09T08:30:47Z 置信度 0.63
• Computational Study of Thermal Stress in Gate-All-Around Nanosheet Field Effect Transistor
  crossref Wenxuan Zang, Yanbin Yang, Wenchao Chen 2023-01-30T20:14:46Z 置信度 0.64
• Design Optimization of 10 nm Channel Length InGaAs Vertical Gate-All-Around Transistor (Nanowire)
  crossref Shreyas Kulkarni, Sangeeta Joshi, Dattatray Bade, Subha Subramaniam 2018-09-12T14:15:23Z 置信度 0.63
• Ferroelectric Gate-All-Around Transistors for 3D-Integrated Electronics and Neuromorphic Vision
  crossref 2026-06-10T06:00:36Z 置信度 0.66
• Sub5 nm Gate-All-Around InP Nanowire Transistors toward High-Performance Devices
  crossref 2023-12-28T15:00:16Z 置信度 0.64
• Fabrication and Characterization of Gate-All-Around Stacked-Nanowire/Nanosheet MOS transistors realized by a Gate-Last approach for sub-7 nm technology nodes.
  Fabrication et caractérisation de transistors MOS à base de nanofils de silicium empilés et à grille enrobante réalisés par approche Gate-Last pour les noeuds technologiques sub-7 nm. La diminution de la taille des transistors actuellement utilisés en microéle…
  crossref Loic Gaben 2026-04-02T15:53:23Z 置信度 0.82 philosophypolitical sciencecondensed matter physicsinformation theoryai governance
• Device/Circuit Simulations of Silicon Spin Qubits Based on a Gate-All-Around Transistor
  crossref Tetsufumi Tanamoto, Keiji Ono 2026-03-25T19:57:30Z 置信度 0.66
• Live Monitoring of Microenvironmental pH Based on Extracellular Acidosis around Cancer Cells with Cell-Coupled Gate Ion-Sensitive Field-Effect Transistor
  crossref 2020-04-09T09:30:40Z 置信度 0.64
• Design and Analysis of Gate Engineered Gate-AII-Around (GAA) Charge Plasma Nanowire Field Effect Transistor
  crossref Leo Raj Solay, Pradeep Kumar, Intekhab Amin, Sunny Anand 2021-05-11T00:50:04Z 置信度 0.64
• A novel recessed-source negative capacitance gate-all-around tunneling field effect transistor for low-power applications
  crossref Weijie Wei, Weifeng Lü, Ying Han, Caiyun Zhang 等 2024-02-08T17:04:43Z 置信度 0.66
• A Novel Hybrid-Channel Gate-All-Around Nanosheet Transistor for Leakage Control and Subthreshold Slope Reduction
  crossref Yumin Xu, Chunlei Wu, Boqian Shen, Fei Zhao 等 2024-05-22T17:32:27Z 置信度 0.66
• Analytical Current–Voltage Modeling and Analysis of the MFIS Gate-All-Around Transistor Featuring Negative-Capacitance
  Recently, in accordance with the demand for development of low-power semiconductor devices, a negative capacitance field-effect-transistor (NC-FET) that integrates ferroelectric material into a gate stack and utilizes negative capacitive behavior has been wide…
  crossref Yeji Kim, Yoongeun Seon, Soowon Kim, Jongmin Kim 等 2021-05-14T10:54:22Z 置信度 0.79 materials sciencephysics.app-phphysicselectrical engineering, electronic engineering, information engineeringcond-mat.mes-hall
• Impact of Fringing Fields on Electrostatic and Analog/Radio Frequency Performance of Graded Channel Junctionless Gate-All-Around Metal Oxide Field Effect Transistor
  crossref Vidyadhar Gupta, Vedvrat, Abhinav Gupta, Amit Kumar Pandey 等 2025-09-16T14:59:17Z 置信度 0.66
• Superior subthreshold characteristics of gate-all-around p-type junctionless poly-Si nanowire transistor with ideal subthreshold slope
  Abstract Junctionless p-type polycrystalline silicon (poly-Si) nanowire (NW) transistor with ideal subthreshold slope (SS) is successfully demonstrated by a gate-all-around channel structure and improved fabrication processes with highly suppressed grain bound…
  crossref Min-Ju Ahn, Takuya Saraya, Masaharu Kobayashi, Naomi Sawamoto 等 2020-06-19T18:15:14Z 置信度 0.79 materials scienceoptoelectronicssemiconductorquantum dotperovskite
• Performance-Oriented Analytical Modelling of Channel Engineered-Macaroni Induced Gate All Around Field Effect Transistor for Off-State Leakage Mitigation
  In this manuscript, a comprehensive analytical model has been formulated for the Channel Engineered-Macaroni Induced (CE-MI) Gate All Around Field Effect Transistor (GAA FET), aimed at addressing the issue of OFF-state leakage current, specifically gate-induce…
  crossref Aapurva Kaul, Sonam Rewari, Deva Nand 2025-09-22T22:50:26Z 置信度 0.82 materials scienceoptoelectronicsperovskitesemiconductorphysics.app-ph
• Drift–diffusion-Poisson- dual phase lag thermal model with phonon scattering in gate all around field effect transistor
  crossref Maissa Belkhiria, Haifa A. Alyousef, Hanen Chehimi, Fatma Aouaini 等 2022-08-03T02:06:32Z 置信度 0.64
• Design and Analysis of Dielectric Materials on Gate All Around Tunnel Field Effect Transistor
  crossref Nithin NR Kumar, Ajay Sudhir Bale, Jayanth S, Kotapothula Anil Kumar 等 2023-05-30T17:17:45Z 置信度 0.64
• Gate-All-Around Transistors at 3nm: Device Physics, Fabrication Challenges, and Beyond FinFET Scaling
  crossref Aditya Sinha, Nishant Choudhary 2025-09-26T22:22:29Z 置信度 0.66
• Ultimate vertical gate-all-around metal–oxide–semiconductor field-effect transistor and its three-dimensional integrated circuits
  crossref Shujun Ye, Kikuo Yamabe, Tetsuo Endoh 2021-07-01T19:52:28Z 置信度 0.64
• Design Optimization and Analysis of InGaAs-Based Gate-All-Around (GAA) Junctionless Field-Effect Transistor (JLFET)
  crossref Jae Hwa Seo, Young Jun Yoon, Jung-Hee Lee, In Man Kang 2017-08-13T03:02:26Z 置信度 0.63
• Impact of Local High-k Insulator on Drivability and Standby Power of Gate-All-Around Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistor
  In this paper, we study the impact of a local high- k gate insulator on the drivability and off-current of a gate-all-around (GAA) silicon-on-insulator (SOI) metal–oxide–semiconductor field-effect transistor (MOSFET). The replacement of part of the gate SiO 2 …
  crossref Yasuhisa Omura, Osanori Hayashi, Shunsuke Nakano 2010-04-20T01:57:52Z 置信度 0.75 climatologytopological insulatorcond-mat.mes-hallphysics.app-phmarine engineering
• Impact of Device Parameters on the Threshold Voltage of Double-Gate, Tri-Gate and Gate-All-Around MOSFETs
  crossref Shankaranand Jha, Santosh Kumar Choudhary 2019-07-25T19:47:28Z 置信度 0.64
• Effect of Various Parameter Variations on Electrical Characteristics of Rectangular Gate All Around Junctionless Transistor
  crossref Manish Kumar Rai, Sanjeev Rai, Abhinav Gupta 2020-10-14T19:03:06Z 置信度 0.64
• Performance Analysis of Junctionless Gate-All-Around Transistor for various Channel Lengths (20 nm,15 nm and 10 nm)
  crossref Manish Kumar Rai, Satyajeet Sahoo, Satya Sri Prabhas Routh, Satyanarayana Karumuri 等 2026-03-02T20:52:26Z 置信度 0.66
• In-silico Investigation of Cyl. Gate all Around (GAA) Tunnel Field Effect Transistor (TFET) Biosensor
  Abstract For some time now, the advancement of low power and high sensitivity biosensors has been the center of attention for in-situ detection and monitoring which form an integral part of portable health monitoring systems. This paper elucidates the design-o…
  crossref Sanjana Tiwari, Arya Dutt, Mayuresh Joshi, Prakhar Nigam 等 2021-07-23T17:10:39Z 置信度 0.79 materials sciencephysics.app-phphysical sciencesquantum dotgraphene
• Fabrication and Transport Behavior Investigation of Gate-All-Around Silicon Nanowire Transistor from Top-Down Approach
  Gate-all-around silicon nanowire transistor (SNWT) can be considered as the potential candidate for highly scaled devices. This paper mainly discusses a new process integration scheme, which features bulk substrate based, epi-free integration, self-aligned str…
  crossref Ru Huang, Runsheng Wang, Yu Tian, Jing Zhuge 等 2009-07-13T22:26:46Z 置信度 0.75 materials sciencecond-mat.mtrl-scicond-mat.mes-hallcondensed matter physicsoptoelectronics
• SiX2 (X = S, Se) Nanowire Gate-All-Around MOSFETs for Sub5 nm Applications
  crossref 2024-05-09T15:50:12Z 置信度 0.66
• A Compact Model of Gate Capacitance in Ballistic Gate-All-Around Carbon Nanotube Field Effect Transistors
  crossref 2021-07-01T11:48:40Z 置信度 0.64
• Failure analysis of Gate-all-around Nanowire Field Effect Transistor under TLP test
  crossref Guoyan Zhang, Aihua Dong, Nie Liu, Rui Tian 等 2015-03-17T23:14:30Z 置信度 0.63
• Design Optimization of Ge/GaAs-Based Heterojunction Gate-All-Around (GAA) Arch-Shaped Tunneling Field-Effect Transistor (A-TFET)
  crossref Jae Hwa Seo, Young Jun Yoon, In Man Kang 2018-04-20T00:37:10Z 置信度 0.63
• From Gate-all-Around to Nanowire MOSFETs
  crossref Jean-Pierre Colinge 2008-05-15T10:57:32Z 置信度 0.61
• Noise in SOI MOSFETs and Gate-All Around Transistors
  crossref B. Iñiguez 2005-08-24T22:14:26Z 置信度 0.61
• All-2D van der Waals Heterostructure-Based Gate-Sensitive Field-Effect Transistor Platform for Ultrasensitive and Selective Hydrogen Sensing
  crossref 2026-03-23T16:21:30Z 置信度 0.66
• Bias Temperature Instability Reliability in Stacked Gate-All-Around Nanosheet Transistor
  crossref Miaomiao Wang, Jingyun Zhang, Huimei Zhou, Richard G. Southwick 等 2019-05-24T04:11:10Z 置信度 0.64
• CMOS-compatible gate-all-around silicon nanowire detector
  crossref Maryam Ziaei-Moayyed, Murat Okandan 2012-03-01T11:33:32Z 置信度 0.63
• Tunable Superlinear Gallium Oxide Gate-All-Around Deep-Ultraviolet Phototransistor for Near-Field Imaging
  crossref 2025-09-09T01:00:11Z 置信度 0.66
• Electrostatic Modulation for Enhanced Ion Selectivity in Gate-All-Around Multilayer Stacked Graphene Nanopore
  crossref 2024-09-27T07:22:22Z 置信度 0.66
• Comparative Analysis of Top Gate CNTFET and Gate All Around CNTFET Magnitude Comparator
  crossref Geetha Amrutha Mandalapu, Rupa Kasireddy, Amandeep Singh 2026-01-19T20:51:22Z 置信度 0.66
• Junctionless Gate-All-Around Nanowire FET with Asymmetric Spacer for Continued Scaling
  Abstract In this paper we have performed scaling performance of asymmetric junctionless (JL) SOI nanowire FET at 10 nm gate length ( L G ). To study the device electrical performance various DC metrics like SS, DIBL, I ON / I OFF ratio are performed. Even at 5…
  crossref Bharath Sreenivasulu Vakkalak, Vadthiya Narendar 2021-11-01T17:06:02Z 置信度 0.79 materials sciencephysics.app-phsemiconductorcond-mat.mes-hallphysical sciences
• Analog/RF performance of Hexagonal Gate All Around Nanosheet FET with Spacer Engineering
  The analog/RF performance of gate-all-around nanosheet field-effect transistor (GAA NSFET) with spacer dielectric engineering is investigated using three-dimensional TCAD tool. The analog/RF figures of merit of the proposed GAA NSFET, including the intrinsic g…
  crossref Lakshmana Chandana, Subba Rao Suddapalli 2026-05-11T14:06:32Z 置信度 0.82 materials sciencephysical sciencescomputer and information scienceselectrical engineering, electronic engineering, information engineeringinformation theory
• Gate-all-around transistors stack up
  crossref Stuart Thomas 2020-12-11T17:04:57Z 置信度 0.64
• Investigations on the physical limitation and electrostatic improvement of a gate-all-around silicon nanowire transistor with Schottky barrier source/drain
  crossref Zhaoyi Kang, Liangliang Zhang, Runsheng Wang, Ru Huang 2009-09-03T03:13:48Z 置信度 0.61
• Displacement damage physics in gate-all-around nanosheet field effect transistors
  Introduction All major integrated device manufacturers have introduced Gate All Around Nanosheet Field Effect Transistors (GAA NSFETs) as the next generation technology for CMOS applications. The design of GAA NSFETs is similar to Silicon-On-Insulator (SOI) te…
  crossref 2025-07-22T16:37:26Z 置信度 0.82 materials sciencephysical sciencesphysicscomputer scienceoptoelectronics
• Characteristic of p-Type Junctionless Gate-All-Around Nanowire Transistor and Sensitivity Analysis
  crossref Ming-Hung Han, Chun-Yen Chang, Yi-Ruei Jhan, Jia-Jiun Wu 等 2013-01-02T19:00:43Z 置信度 0.63
• An investigation of a suppressed-drain cylindrical gate-all-around retrograde-doped heterospacer steep-density-film tunneling field-effect transistor
  crossref Sanjana Tiwari, Arya Dutt, Mayuresh Joshi, Prakhar Nigam 等 2021-07-05T09:02:55Z 置信度 0.64
• Sub‐20 nm Ferroelectric Junctionless Gate‐All‐Around Metal‐Oxide‐Semiconductor Field‐Effect Transistor for Low‐Power Applications: Switching Performances and Subthreshold Circuit Analysis
  Single‐gate metal‐oxide‐semiconductor field‐effect transistors (MOSFET) suffer from several basic physical and electrical limitations for further scaling in deep nanoscale domains, which are often known as short‐channel and reliability effects. The junctionles…
  crossref Ibrahim Rahmani, Hichem Ferhati, Zohir Dibi, Faycal Djeffal 2025-06-28T03:09:59Z 置信度 0.82 electrical engineering, electronic engineering, information engineeringphysical sciencesmaterials scienceengineeringphysics.app-ph
• Study of selective isotropic etching effects of Si1-xGex in gate-all-around nanosheet transistor process
  crossref Qi Yan, Hua Shao, Junjie Li, Zhenzhen Kong 等 2023-05-01T13:26:51Z 置信度 0.64
• Design optimization of Si/Ge-based heterojunction arch-shaped gate-all-around (GAA) tunneling field-effect transistor (TFET) which applicable for future mobile communication systems
  crossref Jae Hwa Seo, Young Jun Yoon, Ra Hee Kwon, Young In Jang 等 2016-03-28T21:06:26Z 置信度 0.63
• Simulation study on influence of interface trap position in Sii-xGex Gate-All-Around (GAA) field-effect transistor
  crossref Ryoongbin Lee, Suhyeon Kim, Sangwan Kim, Sihyun Kim 等 2018-04-06T00:22:40Z 置信度 0.63
• Gate-Drain Leakage Enhanced by Drain-Induced Dielectric Barrier Lowering in Gate-All-Around Field Effect Transistors
  Gate-All-Around Field-Effect Transistors (GAAFETs), now entering high-volume production as successors to fin field-effect transistor technology, are enabling continued scaling and enhanced performance in advanced semiconductor nodes. However, the drain-current…
  crossref Juan P. Mendez, Coleman Cariker, Michael Titze, Alex A. Belianinov 等 2025-12-09T22:42:37Z 置信度 0.82 materials sciencecond-mat.mtrl-scicond-mat.mes-hallphysics.app-phoptoelectronics
• Electrical characterization of n-type cylindrical gate all around nanowire junctionless transistor with SiO2 and high-k dielectrics
  crossref Nurul Ezaila Alias, Mohammed Adamu Sule, Michael Loong Peng Tan, Afiq Hamzah 等 2020-08-14T20:51:51Z 置信度 0.64
• Mueller matrix spectroscopic ellipsometry based scatterometry simulations of Si and Si/SixGe1-x/Si/SixGe1-x/Si fins for sub-7nm node gate-all-around transistor metrology
  crossref Madhulika Korde, Sonal Dey, Alain Diebold, Nick Keller 2018-03-19T18:13:34Z 置信度 0.63
• Peculiarities of the SCLC Effect in Gate‐All‐Around Silicon Nanowire Field‐Effect Transistor Biosensors
  Abstract High‐quality liquid gate‐all‐around (LGAA) silicon nanowire (NW) field‐effect transistor (FET) biosensors are fabricated and studied their properties in 1 m m phosphate‐buffered saline solution with pH = 7.4 using transport and noise spectroscopy. At …
  crossref Yongqiang Zhang, Nazarii Boichuk, Denys Pustovyi, Valeriia Chekubasheva 等 2024-04-01T03:20:45Z 置信度 0.82 materials sciencephysics.app-phcond-mat.mes-hallphysicsmeteorite
• The Optimization of Gate All Around-L-Shaped Bottom Select Transistor in 3D NAND Flash Memory
  crossref Xingqi Zou, Lei Jin, Dandan Jiang, Yu Zhang 等 2018-02-19T23:37:02Z 置信度 0.63
• Enhanced Performance for SiGe/Si Gate-All-Around Field-Effect-Transistor with Ge Condensation Using Supercritical Fluid Treatment
  crossref Wei-Ren Chen, Dun-Bao Ruan, Kuei-Shu Chang-Liao, Hao-Yan Wang 等 2023-07-21T17:21:52Z 置信度 0.64
• Subthreshold Analytical Model of Asymmetric Gate Stack Triple Metal Gate All Around MOSFET (AGSTMGAAFET) for Improved Analog Applications
  Abstract In this paper, we have proposed a 2D analytical model for Asymmetric gate stack triple metal gate MOSFET(AGSTMGAAFET) and performed a comparative analysis with the simulation results obtained using the SILVACO 3D simulation software. Existing devices …
  crossref Arvind Ganesh, Kshitij Goel, Jaskeerat Singh Mayall, Sonam Rewari 2021-04-12T13:54:54Z 置信度 0.79 materials sciencephysics.app-phsemiconductorelectrical engineering, electronic engineering, information engineeringeess.sp
• Evaluation of Radio-Frequency Performance of Gate-All-Around Ge/GaAs Heterojunction Tunneling Field-Effect Transistor with Hetero-Gate-Dielectric by Mixed-Mode Simulation
  crossref Hee Bum Roh, Jae Hwa Seo, Young Jun Yoon, Jin-Hyuk Bae 等 2014-11-28T16:15:10Z 置信度 0.63
• Radiation effects in gate-all-around structures
  crossref R.K. Lawrence, J.P. Colinge, H.L. Hughes 2002-12-09T23:24:26Z 置信度 0.61
• Gate‐All‐Around (GAA) Nanowire for Vertical Memory
  crossref 2014-07-26T02:25:36Z 置信度 0.63
• Gate-all-around vertical silicon nanowire (GAA-VSiNW) fets : junction and threshold voltage engineering for optimum performance and scalability
  crossref Weijie Lu 2020-10-28T06:55:20Z 置信度 0.64
• Nanometric gate-all-around transistors on silicon vertical channel : fabrication, characterization, and development of the standard logic gates
  Transistors nanométriques à grille entourante sur canal vertical en silicium : fabrication, caractérisation et développement de portes logiques standards La taille des données et les exigences en matière de fonctionnalité pour l'informatique ne cessent d'augme…
  crossref Abhishek Kumar 2026-04-07T14:30:39Z 置信度 0.76
• Gate-all-around nanosheet transistors go 2D
  crossref Zhihong Chen 2022-12-12T17:06:28Z 置信度 0.64
• Simulation of Different Structured Gate-All-Around Fets for Low-Power Integrated Circuits
  crossref Nathan Totorica, Wei Hu, Feng Li 2023-08-14T12:48:49Z 置信度 0.64
• Simulation Study of Short Channel Effects in New Hemispherical Gate-All-Around (HGAA) MOS Devices
  This work presents a numerical simulation study of short channel effect (SCE) in new hemispherical gate-all-around (HGAA) MOS devices. These new HGAA architectures allow optimizing the gate electrostatic control of simple GAA MOS devices after rounding their c…
  crossref Francis Balestra, Gerard Ghibaudo 2026-05-20T01:23:37Z 置信度 0.82 electrical engineering, electronic engineering, information engineeringphysicsmaterials sciencecond-mat.mes-hallcond-mat.mtrl-sci
• Impact of Silicon Body Thickness on the Performance of Gate-all-around Silicon Nanowire Field Effect Transistor
  crossref Richa Gupta, Devi Dass, Rakesh Prasher, Rakesh Vaid 2013-11-27T10:52:40Z 置信度 0.63
• Performance Evaluation and Stability Analysis of Gate-All-Around Junctionless Transistor Based 6T SRAM Memory Cell
  crossref Raj Sambhav, Yogesh Pratap 2025-06-11T00:20:52Z 置信度 0.66
• Enhancing the design and performance of a gate-all-around (GAA) charge plasma nanowire field-effect transistor with the help of the negative-capacitance technique
  crossref Leo Raj Solay, S. Intekhab Amin, Pradeep Kumar, Sunny Anand 2021-11-11T08:02:45Z 置信度 0.64
• Isomorphic polynomial based precise analytical modeling of 3D potential distribution for surrounding gate gate-all-around MOSFET
  crossref Dheeraj Sharma, Santosh Kumar Vishvakarma 2013-10-29T23:20:35Z 置信度 0.63
• Selective etching behavior of SiGe via controlled N(III) species with formation of NOCl for the integration of Gate-All-Around transistor
  crossref Kiwon Song, Sangwoo Lim 2026-03-09T09:52:47Z 置信度 0.66
• A Sige Channel Gate-All-Around Transistor Fabricated Using Novel Cyclic Self-Limiting Wet Etching Combined with SI Removal Process
  crossref KaiMin Feng, HaoYan Liu, HuaiZhi Luo, Xi Zhang 等 2025-06-03T17:42:31Z 置信度 0.66
• Capacitance-Voltage Characteristics of Gate-All-Around In_xGa_1-XAs Nanowire Transistor
  Abstract not Available.
  crossref Quazi D. M. Khosru, Saeed Uz Zaman Khan, Md. Shafayat Hossain, Fahim Ur Rahman 等 2020-02-27T00:29:14Z 置信度 0.64
• A Two‐Step Dry Etching Model for Non‐Uniform Etching Profile in Gate‐All‐Around Field‐Effect Transistor Manufacturing
  Abstract The Gate‐All‐Around Field‐Effect Transistor (GAAFET) is proposed as a successor to Fin Field‐Effect Transistor (FinFET) technology to increase channel length and improve the device performance. The GAAFET features a complex multilayer structure, which…
  crossref Ziyi Hu, Junjie Li, Rui Chen, Dashan Shang 等 2024-10-11T04:39:40Z 置信度 0.82 control theoryadsorptioncryptography and securitychemical engineeringmaterials science
• Simulation Study of the Instability Induced by the Variation of Grain Boundary Width and Trap Density in Gate-All-Around Polysilicon Transistor
  crossref Po-Jui Lin, Yung-Yueh Chiu, Frederick Chen, Riichiro Shirota 2021-02-23T20:49:35Z 置信度 0.64
• Capacitance-Voltage Characteristics of Gate-All-Around In_xGa_1-XAs Nanowire Transistor
  This work demonstrates a self-consistent 2-D numerical model for calculating the charge profile and gate capacitance and therefore obtaining C-V characteristics of a gate-all-around III-V nanowire transistor with a high mobility In 0.53 Ga 0.47 As channel and …
  crossref Quazi D. M. Khosru, Saeed Uz Zaman Khan, Md. Shafayat Hossain, Fahim Ur Rahman 等 2013-05-02T22:48:31Z 置信度 0.78 physical sciencesoptoelectronicsmaterials sciencecond-mat.mes-hallphysics
• Nonvolatile Memory by All-Around-Gate Junctionless Transistor Composed of Silicon Nanowire on Bulk Substrate
  crossref Sung-Jin Choi, Dong-Il Moon, Sungho Kim, Jae-Hyuk Ahn 等 2011-04-15T23:56:13Z 置信度 0.63
• Performance Analysis of Negative Capacitance-Based Gate All Around Tunnel Field Effect Transistor
  crossref Shubham Verma, Vimal Kumar Singh Yadav, Sanjeev Rai 2025-10-29T07:24:06Z 置信度 0.66
• An analytical model for the insulated-gate bipolar transistor under all free-carrier injection conditions
  crossref Y. Yue, J.J. Liou, I. Batarseh 2002-12-23T23:08:12Z 置信度 0.61
• Effect of Ga fraction in InGaAs channel on performances of gate-all-around tunneling field-effect transistor
  crossref Young Jae Kim, Young Jun Yoon, Jae Hwa Seo, Sung Min Lee 等 2014-11-28T17:40:59Z 置信度 0.63
• Simulation of Gate-All-Around Tunnel Field-Effect Transistor with an n-Doped Layer
  crossref Dong Seup LEE, Hong-Seon YANG, Kwon-Chil KANG, Joung-Eob LEE 等 2010-05-06T06:03:15Z 置信度 0.61
• Benchmarking Performance of a Gate-All-Around Germanium Nanotube Field Effect Transistor (GAA-GeNTFET) against GAA-CNTFET
  crossref Amir Hossein Bayani, Daryoosh Dideban, Mojtaba Akbarzadeh, Negin Moezi 2017-02-15T20:50:24Z 置信度 0.63