半导体与先进封装 · 全部实体（第 5 / 100 页）

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• High-? transistor characteristics
  crossref Jack C Lee, Katsunori Onishi 2004-11-26T05:04:02Z 置信度 0.61
• Simulation Study of Short Channel Effects in New Hemispherical Gate-All-Around (HGAA) MOS Devices
  This work presents a numerical simulation study of short-channel effect (SCE) in new hemispherical gate-all-around (HGAA) MOS devices. These new HGAA architectures enable the optimization of the gate-electrostatic control of simple GAA MOS devices after roundi…
  crossref Francis Balestra, Gerard Ghibaudo 2026-07-03T09:34:11Z 置信度 0.82 electrical engineering, electronic engineering, information engineeringmaterials sciencephysicscond-mat.mtrl-scicomputer and information sciences
• Gate-All-Around (GAA) NWFET with L g = 10 nm Simulation
  crossref Yung-Chun Wu, Yi-Ruei Jhan 2017-06-21T03:34:23Z 置信度 0.63
• A self-consistent model for hetero-gate all around tunnel FET
  crossref B. Bhowmick, K. Jena, S. Baishya 2014-10-22T20:11:39Z 置信度 0.63
• Dual Gate Junctionless Gate-All-Around (JL-GAA) FETs using Hybrid Structured Channels
  crossref Caleb Meriga, Ravi Teja Ponnuri, B. Vamsi Krishna, Shaik Ahmad Saidulu 等 2020-08-03T22:08:07Z 置信度 0.64
• RF and Linearity Parameter Analysis of Junction-less Gate All Around (JLGAA) MOSFETs and their dependence on Gate Work Function
  crossref Pratikhya Raut, Umakanta Nanda 2021-08-18T23:36:46Z 置信度 0.64
• Modelling and simulation of Si and InAs gate all around (GAA) nanowire transistors
  crossref Neel Chatterjee, Sujata Pandey 2016-04-20T03:26:53Z 置信度 0.63
• An area efficient gate-all-around ring MOSFET
  crossref Ya-Chi Huang, Meng-Hsueh Chiang, Shui-Jinn Wang 2016-10-10T12:07:03Z 置信度 0.63
• Analytical Approach and Simulation of GaN Single Gate TFET and Gate All around TFET
  In this work, we investigate the impact of Gallium Nitride (GaN) based Single Gate Tunnel field effect transistors (SG TFET) and Gate All Around (GAA) TFET by using analytical models. The models are derived by solving the 2D-Poisson’s equation and Parabolic Ap…
  crossref T.S.Arun Samuel, N. Arumugam, S.Theodore Chandra 2022-03-01T09:40:24Z 置信度 0.79 semiconductorconvolutional neural networkartificial neural networkcontrol theorytokamak
• Spectrally Tunable Broadband Gate-All-Around InAsP/InP Quantum Discs-in-Nanowire Array Phototransistors with a High Gain-Bandwidth Product
  crossref 2023-05-23T07:40:26Z 置信度 0.64
• NBTI and dynamic variability in highly-scaled planar and gate-all-around MOSFETs
  crossref Ru Huang 2013-03-02T02:38:17Z 置信度 0.63
• Gate-All-Around FETs: Nanowire and Nanosheet Structure
  DC/AC performances of 3-nm-node gate-all-around (GAA) FETs having different widths and the number of channels (Nch) from 1 to 5 were investigated thoroughly using fully-calibrated TCAD. There are two types of GAAFETs: nanowire (NW) FETs having the same width (…
  crossref Jun-Sik Yoon, Jinsu Jeong, Seunghwan Lee, Junjong Lee 等 2020-11-06T11:04:43Z 置信度 0.79 materials sciencecs.itai governancepetroleum engineeringoptics
• Triangular Gate-all-around Nanowire FETs with Enhanced Electrical Performance using High-K Dielectric Gate Oxide
  crossref Ankit Gaurav 2016-02-24T05:18:08Z 置信度 0.63
• High performance gate-all-around devices using metal induced lateral crystallization
  crossref V.W.C. Chan, P.C.H. Chan 2002-11-07T20:32:49Z 置信度 0.61
• Gate All Around MOSFETs‐A Futuristic Approach
  crossref Ritu Yadav, Kiran Ahuja 2023-06-25T00:47:53Z 置信度 0.64
• A subthreshold surface potential model to study the effect of dual material gate in gate all around n-TFETs
  crossref Sayani Ghosh, Chandan K. Sarkar 2013-02-08T21:27:32Z 置信度 0.63
• A dopingless gate-all-around (GAA) gate-stacked nanowire FET with reduced parametric fluctuation effects
  crossref Sarabdeep Singh, Ashish Raman 2018-04-16T14:31:15Z 置信度 0.63
• Silicon-on-insulator 'gate-all-around device'
  crossref J.P. Colinge, M.H. Gao, A. Romano-Rodriguez, H. Maes 等 2002-12-04T22:06:48Z 置信度 0.61
• Introduction
  crossref 2009-01-15T12:12:02Z 置信度 0.55
• High-??/metal gate for advanced transistor applications
  crossref Tianli Duan 2019-10-03T07:01:23Z 置信度 0.64
• Multiple Gate Technologies
  crossref Thierry Poiroux, Maud Vinet, Simon Deleonibus 2009-01-15T12:12:02Z 置信度 0.58
• A comparison of performance between double-gate and gate-all-around nanowire MOSFET
  <span lang="EN-MY">Due to the rapid scaling of </span><span>Complementary Metal-Oxide-Semiconductor</span><span lang="EN-MY"> (CMOS), the structure of the planar MOSFET approaches the scaling limits when the short channel effects …
  crossref Nor Fareza Kosmani, Fatimah A.Hamid, M. Anas Razali 2019-01-26T15:08:01Z 置信度 0.79 cond-mat.mes-hallneuromorphic computinginformation theoryphysics.chem-phcond-mat.mtrl-sci
• Gate-All-Around Nanowire MOSFET With Catalytic Metal Gate For Gas Sensing Applications
  crossref Rajni Gautam, Manoj Saxena, R. S. Gupta, Mridula Gupta 2013-08-02T14:01:00Z 置信度 0.63
• Short Channel Effects suppression in a dual-gate Gate-All-Around Si nanowire junctionless nMOSFET
  crossref M W Rony, Pankaj Bhowmik, Harley R. Myler, Provakar Mondol 2017-02-16T17:32:12Z 置信度 0.63
• Performance Evaluation of Stacked Gate Oxide/High K Spacers Based Gate All Around Device Architectures at 10 nm Technology Node
  crossref Mandeep Singh Narula, Archana Pandey 2022-01-20T13:02:44Z 置信度 0.64
• Analytical Modeling of Threshold Voltage for Dual-Metal Double-Gate Gate-All-Around (DM-DG-GAA) MOSFET
  crossref Reddi Ganapati, Visweswara Rao Samoju, Bhaskara Rao Jammu 2020-08-31T13:28:29Z 置信度 0.64
• Static Performance Assessment of Junctionless Accumulation Mode Gate Stack Gate All Around (JAM-GS-GAA) FinFET Under Severe Temperature
  crossref Bhavya Kumar, Megha Sharma, Rishu Chaujar 2022-01-14T20:40:19Z 置信度 0.64
• Gate-All-Around Charge Plasma-Based Dual Material Gate-Stack Nanowire FET for Enhanced Analog Performance
  crossref Sarabdeep Singh, Ashish Raman 2018-04-04T18:05:40Z 置信度 0.63
• Performance Analysis of Gate-All-Around and Ferroelectric Nanowire FETs with HfO ₂ -Based Gate Dielectrics
  crossref Vishwas Verma, Pawan Kumar Verma 2026-05-21T19:40:52Z 置信度 0.66
• (Invited) Dual-Gate and Gate-All-Around Polycrystalline Silicon Nanowires Field Effect Transistors: Simulation and Characterization
  The need of miniaturization following Moore’s law has intensified research efforts on silicon nanostructures such as nanowires or nanoribbons that can be used as active part of electronic nano-devices. In this way, nanowires offer great potential as field effe…
  crossref Anne-Claire Salaun, Brice Le Borgne, Laurent Pichon 2020-02-27T13:07:36Z 置信度 0.79 materials sciencecomputer sciencephysical sciencescond-mat.mes-hallcond-mat.mtrl-sci
• Novel Architecture in Gate-All-Around (GAA) MOSFET with High-k Dielectric for Biomolecule Detection
  crossref Krutideepa Bhol, Biswajit Jena, Umakanta Nanda, Shubham Tayal 等 2021-07-30T15:51:19Z 置信度 0.64
• Polarity control in double-gate, gate-all-around vertically stacked silicon nanowire FETs
  crossref M. De Marchi, D. Sacchetto, S. Frache, J. Zhang 等 2013-03-20T21:31:24Z 置信度 0.63
• Gate-All-Around Technology for Harsh Environment Applications
  crossref J. P. Colinge 2012-07-29T00:25:55Z 置信度 0.63
• Floating gate potential of gate-all-around floating gate memory cell: parameter extraction and compact model
  Abstract The compact modeling of flash memories is crucial for integrated circuit designers to carry out efficient and precise circuit-level evaluations, particularly in the case of 3D NAND flash where the 3D geometry leads to significant parasitic coupling im…
  crossref Afiq Hamzah, N Ezaila Alias, Zaharah Johari, Michael Loong Peng Tan 等 2024-05-20T18:29:21Z 置信度 0.82 physics.comp-phcontrol theoryeess.syelectrical engineering, electronic engineering, information engineeringphysics.plasm-ph
• Influence of the Ge amount at source on transistor efficiency of vertical gate all around TFET for different conduction regimes
  crossref C. C. M. Bordallo, V. B. Sivieri, J. A. Martino, P. G. D. Agopian 等 2016-03-24T16:22:07Z 置信度 0.63
• Discrete Dopant Effects on Threshold Voltage Variation in Double-Gate and Gate-All-Around Metal-Oxide-Semiconductor Field-Effect-Transistors
  Quantum-transport simulations of current-voltage characteristics are performed in ultra-small double-gate and gate-all-around metal-oxide-semiconductor field-effect-transistors (MOSFETs) with a single attractive ion in the channel region. The ion induces a thr…
  crossref Nobuya Mori, Yoshinari Kamakura, Genaddy Mil'nikov, Hideki Minari 2011-02-21T10:13:21Z 置信度 0.78 topological insulatorphysics.plasm-phplasma physicsq-bio.bminformation theory
• Analysis of GaSb/InAs heterojunction Gate All Around Tunnel FET (HGAATFET)
  crossref Ajay, Mridula Gupta, Shashwat Bhattacharya, Sujata Pandey 2016-04-19T23:26:53Z 置信度 0.63
• Numerical modeling of triple material gate stack gate all-around (TMGSGAA) MOSFET considering quantum mechanical effects
  crossref B. Padmanaban, R. Ramesh, D. Nirmal, S. Sathiyamoorthy 2015-02-16T12:35:17Z 置信度 0.63
• Gate-All-Around Nanosheet FET Device Simulation Methodology Using a Sentaurus TCAD
  crossref Anushka Singh, Archana Pandey 2023-12-06T17:21:48Z 置信度 0.64
• Gate-All-Around Technology is Coming.
  crossref Victor Moroz 2023-03-22T17:51:55Z 置信度 0.64
• Investigation on cylindrical gate-all-around (GAA) tunnel FETS scaling
  crossref M. Kessi, A. Benfdila, A. Lakhlef 2017-12-14T22:12:33Z 置信度 0.63
• Research of Gate-All-Around Field-Effect Transistors.
  This report provides an overview of GAA FETs also known as Gate-All-Around FETs, focusing on their introduction and limitations, based on a comprehensive review of current literature and online resources. GAA FETs represent an evolution of FinFET technology, w…
  crossref Lecheng Pan 2026-01-25T00:19:46Z 置信度 0.82 materials scienceengineeringcomputer scienceelectrical engineering, electronic engineering, information engineeringcomputer and information sciences
• Scaling Beyond 7nm Node: An Overview of Gate-All-Around FETs
  crossref Wei Hu, Feng Li 2021-07-26T21:03:41Z 置信度 0.64
• Characteristics of Gate-All-Around Hetero-Gate-Dielectric Tunneling Field-Effect Transistors
  crossref Jae Sung Lee, Woo Young Choi, In Man Kang 2013-12-21T12:18:17Z 置信度 0.63
• Research of Gate-All-Around Field-Effect Transistors
  This report provides an overview of GAA FETs also known as Gate-All-Around FETs, focusing on their introduction and limitations, based on a comprehensive review of current literature and online resources. GAA FETs represent an evolution of FinFET technology, w…
  crossref Lecheng Pan 2024-10-29T19:52:05Z 置信度 0.82 materials scienceengineeringcomputer scienceelectrical engineering, electronic engineering, information engineeringcomputer and information sciences
• Design Space Exploration of 14nm Gate All around MOSFET
  crossref Rafeek Alas, Kiran Bailey 2016-03-17T20:28:41Z 置信度 0.63
• Analytical Quantum Model for Germanium Channel Gate-All-Around (GAA) MOSFET
  The paper proposes analytical model for Gate-All-Around Metal Oxide Semiconductor Field Effect Transistor (GAA-MOSFET) for germanium channel including quantum mechanical effects. It is achieved by solving coupled Schrodinger-Poisson’s equation using variationa…
  crossref P. Vimala, N.R. Nithin Kumar 2019-08-27T14:27:23Z 置信度 0.79 quantum dotquant-phcond-mat.mes-hallsemiconductorquantum
• Uniaxially tensile strained accumulation-mode gate-all-around Si nanowire nMOSFETs
  crossref Mohammad Najmzadeh, Didier Bouvet, Wladek Grabinski, Adrian M. Ionescu 2011-09-21T16:17:53Z 置信度 0.63
• Review of: "The changes in the width of the nano transistor channel due to the field effect of the gate around can cause undesirable changes and loss of mobility"
  crossref Cita O,brain 2023-11-13T04:58:47Z 置信度 0.64
• An embedded gate gate-all-around FinFET for biosensing application
  crossref Hujun Jia, Wanli Yang, Weitao Cao, Linna Zhao 等 2024-08-31T03:42:44Z 置信度 0.66
• An investigation on a triple material double gate cylindrical gate all around (TMDG-CGAA) MOSFET for enhanced device performance
  crossref Asmita Menaria, Rahul Pandey, Ramesh Kumar 2020-06-03T21:15:33Z 置信度 0.64
• SiGe cantilever channel gate-all-around (GAA) fully depleted (FD) PMOSFET with high-¿ and metal gate
  crossref S.-H. Lee, S. Dey, S V. Joshi, P. Majhi 等 2007-11-06T15:40:09Z 置信度 0.61
• Modeling, verification and comparison of short-channel double gate and gate-all-around MOSFETs
  crossref S. Kolberg, H. Børli, T.A. Fjeldly 2007-10-01T18:00:10Z 置信度 0.61
• Analytical solution of subthreshold channel potential of gate underlap cylindrical gate-all-around MOSFET
  crossref Lining Zhang, Chenyue Ma, Jin He, Xinnan Lin 等 2010-04-21T04:44:50Z 置信度 0.61
• 3D Self-Consistent Quantum Transport Simulation for GaAs Gate-All-Around Nanowire Field-Effect Transistor with Elastic and Inelastic Scattering Effects
  crossref Han-Wei Hsiao, Yuh-Renn Wu 2018-10-08T05:50:26Z 置信度 0.63
• A Vertical Combo Spacer to Optimize Electrothermal Characteristics of 7-nm Nanosheet Gate-All-Around Transistor
  crossref Renhua Liu, Xiaojin Li, Yabin Sun, Yanling Shi 2020-05-04T23:54:12Z 置信度 0.64
• On trap identification in triple-gate FinFETs and Gate-All-Around nanowire MOSFETs using low frequency noise spectroscopy
  crossref D. Boudier, B. Cretu, E. Simoen, A. Veloso 等 2017-07-25T21:38:00Z 置信度 0.63
• Characteristics of Gate-All-Around Hetero-Gate-Dielectric Tunneling Field-Effect Transistors
  In this paper, gate-all-around (GAA) tunneling field-effect transistors (TFETs) with hetero-gate dielectric (HG) materials have been simulated and their characteristics have been optimized as a function of the high- k dielectric length ( L high k ). For the op…
  crossref Jae Sung Lee, Woo Young Choi, In Man Kang 2012-06-20T01:33:10Z 置信度 0.78 materials sciencesemiconductornanotechnologybiologyphysics.app-ph
• Compact Modeling of Drain Current, Charges, and Capacitances in Long-Channel Gate-All-Around Negative Capacitance MFIS Transistor
  crossref Amol D. Gaidhane, Girish Pahwa, Amit Verma, Yogesh Singh Chauhan 2018-03-21T14:04:49Z 置信度 0.63
• Non-Fourier electrothermal fully coupled analysis of a 5 nm gate-all-around field-effect transistor based on density gradient theory
  In the post-Moore era, the three-dimensional fully surrounded channel structure of gate-all-around field-effect transistors (GAAFETs) significantly enhances gate control capabilities. However, its nanoscale features lead to severe overall self-heating effects …
  crossref Zhe Liu, Bo Hua Sun, Hai Hang Cui, Kai Sun 2025-02-07T09:39:36Z 置信度 0.82 materials sciencecond-mat.mtrl-sciphysics.comp-phsemiconductorcond-mat.mes-hall
• Analytical modeling for 3D potential distribution of rectangular gate (RecG) gate-all-around (GAA) MOSFET in subthreshold and strong inversion regions
  crossref Dheeraj Sharma, Santosh Kumar Vishvakarma 2012-03-06T12:15:40Z 置信度 0.63
• Conical surrounding gate MOSFET: a possibility in gate-all-around family
  crossref B Jena, B S Ramkrishna, S Dash, G P Mishra 2016-02-12T09:14:06Z 置信度 0.63
• Design Optimization of InAs-Based Gate-All-Around (GAA) Arch-Shaped Tunneling Field-Effect Transistor (TFET)
  crossref Jae Hwa Seo, Young Jun Yoon, Young-Woo Jo, Dong-Hyeok Son 等 2016-08-20T15:59:39Z 置信度 0.63
• Gate level transistor sizing by nonlinear optimization.
  crossref Raymond Chow 2018-10-04T20:10:16Z 置信度 0.63
• Numerical modelling for triple hybrid gate optimization dielectric modulated junctionless gate all around SiNWFET based uricase and ChOX biosensor
  crossref Rishu Chaujar, Mekonnen Getnet Yirak 2024-06-18T01:02:32Z 置信度 0.66
• DIBL Mitigation Strategies in Gate-all-around Fets for Low Power Performance
  The high demand for low-power data processing in AI chips has necessitated the development of high-performance transistors. To suppress the critical drain-induced barrier lowering (DIBL) effect in gate-all-around field-effect transistors (GAAFETs), this paper …
  crossref Zirou Ji 2026-06-01T07:16:44Z 置信度 0.82 physical sciencesai governanceai safetycorporate governanceknowledge management
• Nanowire Array–Based Gate-All-Around MOSFET for Next-Generation Memory Devices
  crossref Krutideepa Bhol, Biswajit Jena, Umakanta Nanda 2020-07-29T14:20:17Z 置信度 0.64
• (Invited) Doping Considerations for Finfet, Gate-All-Around, and Nanosheet Based Devices
  The IEEE International Roadmap for Devices and Systems (IRDS) for More Moore devices summarises the Logic Device state of play very effectively; the FinFET is the key device architecture that could enable logic device scaling until 2025. Increasing fin height …
  crossref Ray Duffy 2021-07-16T18:58:45Z 置信度 0.79 materials sciencesemiconductorcond-mat.mtrl-scinanotechnologyphysics.app-ph
• Analytical subthreshold swing model of junctionless elliptic gate-all-around (GAA) FET
  <p>An analytical subthreshold swing (SS) model has been presented to determine the SS of an elliptic junctionless gate-all-around field-effect transistor (GAA FET). The analysis of a GAA FET with an elliptic cross-section is essential because it is diffi…
  crossref Hakkee Jung 2024-04-15T11:24:13Z 置信度 0.82 climatologymotor imageryinternal medicinecontrol theoryastrophysics
• Performance of γ-irradiated gate-all-around SOI MOS OTA amplifiers
  crossref A. Vandooren, P. Francis, D. Flandre, J.-P. Colinge 2002-11-23T01:47:57Z 置信度 0.61
• Semi Analytical Modelling for Drain-Induced Barrier Lowering Reduction in Dual-Metal Gate all Around FET
  Abstract In the research paper, the semi-analytical modelling is done for low drain-induced barrier lowering (DIBL) dual-metal gate all around FET (DM GAAFET). Vacuum and silicon nitride are considered in the act of the gate oxide material near drain region fo…
  crossref Amit Kumar, Anil Kumar Rajput, Manisha Pattanaik, Pankaj Srivast 2021-06-03T14:40:36Z 置信度 0.79 semiconductoroptoelectronicsphysics.app-phelectrical engineering, electronic engineering, information engineeringphysical sciences
• Analytical threshold voltage model of gate all around triple metal tunnel FET
  crossref Navjeet Bagga, S. Dasgupta 2017-10-25T15:19:03Z 置信度 0.63
• Impact of Different Gate Dielectric Materials on Analog/RF Performance of Dielectric-Pocket Double Gate-All-Around (DP − DGAA) MOSFETs
  crossref Vaibhav Purwar, Rajeev Gupta, Himanshi Awasthi, Sarvesh Dubey 2022-01-27T00:03:36Z 置信度 0.64
• Nanobridge gate-all-around phototransistors for electro-optical OR gate circuit and frequency doubler applications
  crossref Jin Yong Oh, M. Saif Islam 2014-01-17T15:50:40Z 置信度 0.63
• Subthreshold Analytical Model of Asymmetric Gate Stack Triple Metal Gate all Around MOSFET (AGSTMGAAFET) for Improved Analog Applications
  crossref Arvind Ganesh, Kshitij Goel, Jaskeerat Singh Mayall, Sonam Rewari 2021-06-09T19:03:07Z 置信度 0.64
• Comparative Analysis of Different Materials for Gate-All-Around Nanowire FET
  crossref Salman Saleem, P Vimala 2022-06-16T19:38:00Z 置信度 0.64
• Quantum Dot Gate Field-Effect Transistor (QDGFET): Circuit Model and Ternary Logic Inverter
  crossref Supriya Karmakar 2013-11-20T10:17:51Z 置信度 0.63
• Temperature Dependent Sub threshold Drain Current Model for Junction less Gate all Around MOSFET with High-K Gate Stack
  crossref Suman Sharma, Rajni Shukla 2016-02-15T12:37:39Z 置信度 0.63
• Analytical solution of subthreshold channel potential of gate underlap cylindrical gate-all-around MOSFET
  crossref Lining Zhang, Chenyue Ma, Jin He, Xinnan Lin 等 2010-07-07T08:52:15Z 置信度 0.61
• Asymmetrie Vacuum Gate Dielectric Schottky Barrier Gate all around MOSFET for ambipolarity reduction and improved hot carrier reliability
  crossref Manoj Kumar, Mridula Gupta, Subhasis Haldar, R.S. Gupta 2015-10-01T18:05:50Z 置信度 0.63
• Machine Learning Assisted Sensitivity of Triple-Material Gate -Stack Gate-All-Around (TM-GS-GAA) MOSFET based Biosensor
  crossref Rashmi Gupta, Neeraj Gupta, Arun Kumar Singh, Prashant Kumar 等 2025-05-29T17:06:14Z 置信度 0.66
• Gate Bias Stresses of Gate-All-Around Poly-Si TFTs With Multiple Nanowire Channels
  crossref Tsung-Kuei Kang, Ta-Chuan Liao, Chun-Kai Wang 2012-05-31T18:40:47Z 置信度 0.63
• Design And Analysis Of Gate-All-Around (GAA) Triple Material Gate Charge Plasma Nanowire FET
  crossref Leo Raj Solay, Sunny Anand, S. Intekhab Amin, Pradeep Kumar 2022-02-03T20:30:23Z 置信度 0.64
• Flexible 256×256 All-Organic-Transistor Active-Matrix Optical Imager with Integrated Gate Driver
  crossref Weihong Yang, Jun Li, Peijin Huang, Simon Ogier 等 2026-01-30T21:00:04Z 置信度 0.66
• Compact-Modeling Solutions For Nanoscale Double-Gate and Gate-All-Around MOSFETs
  crossref B. Iniguez, T.A. Fjeldly, A. Lazaro, F. Danneville 等 2006-08-23T15:36:32Z 置信度 0.61
• Negative Capacitance Gate-All-Around Nanowire FETs for Highly Sensitive Catalytic Metal Gate Gas Sensors
  crossref Nazmul Hasan Naime, Afsana Anjum Akhi, Mainul Hossain 2025-04-04T16:50:27Z 置信度 0.66
• Numerical Model of Gate-All-Around MOSFET With Vacuum Gate Dielectric for Biomolecule Detection
  crossref Rajni Gautam, Manoj Saxena, R. S. Gupta, Mridula Gupta 2012-09-19T14:12:14Z 置信度 0.63
• Impact of Interface Roughness on Threshold-Voltage Variation in Ultrasmall Gate-All-Around and Double-Gate Field-Effect Transistors
  Effects of interface roughness on the threshold-voltage variation of nanometer-size gate-all-around (GAA) and double-gate (DG) metal–oxide–semiconductor field-effect transistors (MOSFETs) are investigated using three-dimensional non-equilibrium Green's functio…
  crossref Nobuya Mori, Hideki Minari 2010-04-20T01:58:00Z 置信度 0.75 physics.plasm-phmineralogycondensed matter physicssystems and controltopological insulator
• Analytical subthreshold channel potential model of asymmetric gate underlap gate-all-around MOSFET
  crossref Shaodi Wang, Xinjie Guo, Lining Zhang, Chenfei Zhang 等 2011-02-15T21:12:43Z 置信度 0.63
• High-K Spacer Gate Stack Engineered, Dual Metal Underlap Junction-less GaN Gate All Around (HKS-GSE-DMUL-JGaNGAA) MOSFET for High Frequency Applications
  crossref Anubha Goel, R. S. Gupta 2023-02-16T23:01:47Z 置信度 0.64
• Der IGBT (Insulated Gate Bipolar-Transistor)
  crossref Rainer Kassing 2018-04-13T05:52:02Z 置信度 0.63
• Umbrella-shaped gate field-effect transistor for biosensing measurements
  crossref Chengwu Tao 2018-08-10T15:38:27Z 置信度 0.63
• Environmentalists All Around Us
  crossref 2025-07-10T13:01:12Z 置信度 0.66
• Two-dimensional confinement effects in gate-all-around (GAA) MOSFETs
  crossref X. Baie, J.P. Colinge 2002-07-25T13:28:40Z 置信度 0.61
• Impact of Interface-trapped Charges on the Performance of Gaussian-doped Gate-all-around Junctionless MOSFET
  crossref Princy Sharma, Subindu Kumar 2026-01-19T20:51:22Z 置信度 0.66
• Effects of the physical parameter on gate all around FET
  crossref Amit Agarwal, P C Pradhan, Bibhu P Swain 2019-12-03T08:03:24Z 置信度 0.64
• (Invited) Gate-All-Around Ge FETs
  High performance Ge inversion (INV) and junctionless (JL) GAAFETs are demonstrated. The (111) sidewall-enhanced Ge GAA nFETs show 2x enhanced I on of 110 mA/mm at 1V with respect to the devices with near (110) sidewalls and subthreshold characteristics of 94 m…
  crossref C. W. Liu, Yen-Ting Chen, Shu-Han Hsu 2014-09-30T16:56:20Z 置信度 0.78 wearable computercond-mat.mes-halloptoelectronicsedge computingai safety
• InAs nanowire gate-all-around MOSFETs by heterogeneous planar VLS growth
  crossref Chen Zhang, Wonsik Choi, Parsian Mohseni, Xiuling Li 2015-08-12T18:37:34Z 置信度 0.63
• Some Properties of SOI Gate-All-Around Devices
  crossref P. Francis, X. Baie, J. P. Colinge 2015-11-06T07:19:13Z 置信度 0.63
• Numerical Elucidation of the Electrothermal Characteristics of Gate-All-Around FET Devices
  crossref Faouzi Nasri, Husien Salama 2024-03-04T14:00:33Z 置信度 0.66